The invention relates to a method and an arrangement for reducing the linearity error influences in HF circuits, particularly in A/D converters.
Linearity errors of the transmitting function of electronic circuits, of the preselection of a receiver or of an A/D converter, for example, often sharply limit the possibilities to use such circuits for measuring purposes. The non-linearities of such circuits act mainly by means of harmonic waves. Spectrally seen secondary lines (what are known as spurious lines) arise. In an A/D converter, such spurious lines lead to a falsification of the signal to be digitized.
To reduce the linearity errors of A/D converters, what is known as dithering is taught (Large-Scale Dithered ADC, Hewlett Packard Journal, December 1993). An artificially generated auxiliary signal is therein added to the useful signal at the input of the A/D converter, said signal being separated from the useful signal again at the output. In this known method, whose effectiveness depends on the conditions of use and is difficult to assess, particularly for integral non-linearities, the effective control range of the A/D converter is reduced and the useful bandwidth is restricted.